
RF 신호처리를 위한 SoC용 저잡음 전원회로 설계
Ⓒ 2026 Korea Society for Naval Science & Technology
초록
본 논문에서는 시스템의 소형화와 효율적인 고속 데이터 처리를 위해 SoC(system on chip)를 적용한 추적 레이다 시스템에서 전원부의 스위칭 노이즈로 인해 SoC 내부의 동적성능(SFDR, SNR)을 직접적으로 저하시켜 시스템의 병목으로 나타나는 현상을 극복하기 위해 AMD -Xilinx의 Zynq Ultrascale+ RFSoC와 TI DSP를 적용한 RF 신호처리보드의 전원부를 스위칭 레귤레이터와 LDO(low drop-out)의 hybrid 구조로 설계를 제안하였다.
Abstract
In tracking radar systems employing a system-on -chip (SoC) architecture for system miniaturization and high-speed data processing, switching noise in the power supply degrades the dynamic performance of the SoC, constituting a critical system bottleneck. To address this challenge, a power-supply architecture for a radio frequency (RF) signal-processing board incorporating AMD–Xilinx’s Zynq Ultrascale+ RFSoC and Texas Instruments’ digital signal processor is proposed and implemented. The proposed design adopts a hybrid power-supply structure that combines switching and low drop-out regulators to achieve high power efficiency and low-noise performance.
Keywords:
Tracking Radar System, Hybrid Power Architecture, Ultra-Low-Noise Circuit Design, Switching Regulator, Low Drop-Out Regulator키워드:
추적 레이다 시스템, 하이브리드 전원 구조, 초저잡음 회로설계, 스위칭 레귤레이터, LDO 레귤레이터Acknowledgments
이 논문은 2026년도 한국해군과학기술학회 하계학술대회 발표 논문임
References
- Jae-Won Lee, Jin-Kyu Choi, Young-Cheol Shin, Soon-Il Hong, Jae-Deok Ryu, Kyoung-Min Kim, Jae-Woong Yi, Se-Hwan An, & Ji-Han Joo, ‘Development on a Broadband Signal Processing Unit for Application of Small Millimeter Wave Tracking Radar,’ The Transations of the Korean Instituete of Electrical Engineers, VOL. 73, NO. 10, 2024, pp. 1705-1710.
- Jin-Kyu Choi, Chang-Hyun Park, Youn-Jin Kim, Hong-Rak Kim, Jun-Beom Kwon, & Gwang-Hee Kim, ‘A Design Study of Signal Processor for Small Tracking Radar,’ The Journal of the Institute of Internet, Broadcasting and Communication, VOL. 20, NO. 5, 2020, pp. 71-77.
- Hong-Rak Kim, Man-Hee Lee, Younjin Kim, & Sung-Ho Park, ‘Power Circuit Design of Signal Processing Unit for Tracking Radar,’ The Journal of the Institute of Internet, Broadcasting and Communication, VOL. 24, NO. 5, 2024, pp. 123-128.
- Peng-peng Hao, Xu-lin Zhou, Yi-Jing Tang, & Yu Xiao, ‘Research on Multicore Processor’s Architecture Based on TMS320C6678,’ Microelectronics & Computer, VOL. 29, NO. 12, 2012, pp. 171-175.
-
In-Sung Jeon & Sungtaek Chung, ‘Design and Fabrication of Signal Processor for Wideband Digital Receiver Based on Gsps AD Converter,’ Journal of KIIT, VOL. 15, NO. 10, 2017, pp. 55-64.
[https://doi.org/10.14801/jkiit.2017.15.10.55]
-
J. Batlle, J. Martı, P. Ridao, & J. Amat, ‘A New FPGA/DSP-Based Parallel Architecture for Real-Time Image Processing,’ Real-Time Imaging, VOL. 8, NO. 5, 2002, pp. 345-356.
[https://doi.org/10.1006/rtim.2001.0273]